In a semiconductor device manufacturing process, a photolithography technology is used to perform a process such as etching or the like to, e.g., a semiconductor wafer (hereinafter referred to as “wafer”). Typically, in the photolithography technology, a series of processes of coating a resist solution on a base film of a wafer to form a resist film, exposing the resist film in a desired pattern and developing the resist film are performed. As one example of subsequent processes, a dry etching process is performed using the resist pattern formed by the photolithography technology as a mask to form a desired circuit pattern on the wafer.
In recent years, the demand for high integration and miniaturization of a semiconductor device has increased. Further, control of the line width (CD: Critical Dimension) constituting a circuit within a plane of a wafer grows important and miniaturization is also requested in forming a resist pattern.
In a technology of miniaturizing a resist pattern, the line width of the resist pattern must be controlled and there must be improvement in parameters such as the LER (Line Edge roughness) indicative of a degree of irregularity of a sidewall of a resist line pattern, the LWR (Line Width Roughness) indicative of a degree of variation of a line width, the CER (Contact Edge Roughness) indicative of a degree of irregularity of a sidewall of a resist hole pattern, and the like.
However, in the aforementioned conventional technology, the characteristics required in the resist pattern are not sufficient.